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| Description: |
MS Windows based (XP, Vista, 7) CPU and OS simulator. This is an integrated simulator with a high degree of user interactivity and support for visualizations and animations. It is intended to support teaching modules in computer architecture, operating systems and compilers primarily at degree level. The CPU simulator supports a typical RISC-like architecture with a typical set of CPU instructions (not specific to any commercial CPU), addressing modes and a configurable register set. It also incorporates a multi-stage pipeline simulator and instruction/data cache simulators. The OS simulator supports process scheduling and virtual memory management. Advanced features include simulation of deadlocks, synchronization and threads. The simulators also support multiple CPU configurations and OS virtualization simulations. An in-built compiler and assembler can be used to help drive most of the simulations. The compiler can be used to demonstrate typical stages of compiling, various compiler optimizations and instruction re-scheduling for pipeline support. |
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| Keywords: |
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Compiler, CPU Architecture, OS Scheduling, Assembler, Education, CPU Instructions, Computer Architecture, Simulation, Operating Systems
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| More information about this material: |
Primary Audience:
College Lower Division,
College General Ed,
College Upper Division,
Graduate School,
Professional
Mobile Compatibility:
Not specified at this time
Technical Requirements:
Language:
English
Cost Involved:
no
Source Code Available:
no
Accessiblity Information Available:
unsure
Copyright:
yes
Creative Commons:
no
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About this material: |
Peer Reviews (not reviewed)
Workflow status (Not triaged)
Comments (none)
Learning Exercises (none)
Personal Collections (none)
Accessibility Info (none)
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