Design MU0 - a simple microprocessor with FPGA
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Design MU0 - a simple microprocessor with FPGA

        

Design MU0 - a simple microprocessor with FPGA

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This tutorial will cover the design of a simple system-on-a-chip in VHDL, with an emphasis on the development and simulation of a testbench for the mu0 microprocessor. The mu0 and its associated RAM is treated as black boxes, and a testbench is developed around them. The VHDL design of the mu0 can be downloaded from the webpage.
Material Type: Presentation
Technical Format: HTML/Text
Date Added to MERLOT: May 04, 2006
Date Modified in MERLOT: January 21, 2012
Author:
Send email to milenka@ece.uah.edu
Submitter: LI CHEN

Quality

  • Reviewed by members of Editorial board for inclusion in MERLOT.
    Editor Review
    Very good quality; in queue to be peer reviewed
    avg: 5 rating
  • User review 4 average rating
  • User Rating: 4 user rating
  • Discussion (1 Comment)
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About

Primary Audience: College General Ed
Mobile Compatibility: Not specified at this time
Language: English
Cost Involved: no
Source Code Available: no
Accessiblity Information Available: no
Creative Commons: unsure

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Avatar for Gina Smith
3 years ago

Gina Smith (Faculty)

Nice tutorial for the time period it was written. Tools are dated but nice step by step instructions. I have introduced my students to very similar information.

Technical Remarks:

Initially tutorial didn't show up got some different page.
Time spent reviewing site: 10 mins