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Material Detail

Simulación Básica de un IP

Simulación Básica de un IP

En este vídeo observamos la simulación con modelsim de un diseño (IP) realizado . El banco de pruebas es realizado completamente en verilog y mostramos cómo configurar completamente Quartus para poder ejecutar el banco de pruebas.
Keywords:
Verilog, Simulación, Banco de pruebas
Disciplines:
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More about this material

Material Type:
Animation
Date Added to MERLOT:
October 4, 2019
Date Modified in MERLOT:
October 4, 2019
Author:
Submitter:
RIUNET Universitat Politècnica de València
Primary Audience:
High School, College General Ed, College Lower Division, College Upper Division, Graduate School
Technical Format:
Video, Website
Mobile Compatibility:
Blackberry, iOS (Apple), Windows Mobile, Android
Language:
Spanish
Cost Involved:
No
Source Code Available:
No
Creative Commons:
No

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