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Material Detail

Design MU0 - a simple microprocessor with FPGA

Design MU0 - a simple microprocessor with FPGA

This tutorial will cover the design of a simple system-on-a-chip in VHDL, with an emphasis on the development and simulation of a testbench for the mu0 microprocessor. The mu0 and its associated RAM is treated as black boxes, and a testbench is developed around them. The VHDL design of the mu0 can be downloaded from the webpage.
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More about this material

Material Type:
Presentation
Date Added to MERLOT:
May 4, 2006
Date Modified in MERLOT:
June 12, 2018
Author:
 
Submitter:
LI CHEN
Primary Audience:
College General Ed
Technical Format:
Website
Mobile Compatibility:
Not specified at this time
Language:
English
Cost Involved:
No
Source Code Available:
No
Creative Commons:
No

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Comments

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Gina Smith
Gina Smith (Faculty)
14 years ago
Nice tutorial for the time period it was written. Tools are dated but nice step by step instructions. I have introduced my students to very similar information.

Technical Remarks:

Initially tutorial didn't show up got some different page.
Time spent reviewing site: 10 mins